Modeling Engineer

Kandou Ai - Saint-Sulpice - original posting ->
Status
Open
Remote policy
Not stated
Employment type
Full-time
Salary
Not stated
Categories
Engineering
Tech
pythonsoftware
Source
arbeitnow
First observed
2026-09-27 11:42 UTC
Last seen
2026-09-27 12:49 UTC
Source claims posted
2026-09-27 10:04 UTC
Consecutive misses
0 of 3

What the posting says

We at Kandou are a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. Our list of costumers reads like a who's who of the technology world. If you love to be part of a start-up that is challenging established tech giants and you are a proactive problem-solver who is motivated by pushing your limits and challenging the status quo, we have an opportunity for you.

Role responsibilities

Design circuit models with abstraction levels from mathematical description to back extracted circuit performance that allow trade off of simulation time versus accuracy

Delivery of circuit models that generate sub-block circuit specifications from architecture specification and system models

Verify post-layout sub-blocks deliver specified, modelled performance

Ability to communicate effectively with technical leads, designers and system modelling team, throughout the design process, to optimize block specifications and performance and to ensure system modelling is accurate

Document and present performance of modelled sub-circuits at various phase gates through the design cycle

Documentation of modelling methodology and correlation of the abstraction levels with each other and with analog circuit simulations

Innovate and deliver creative modelling solutions for analog circuits

Rigorous approach focused on delivering high quality results using Kandou’s design process flow.

Competencies

Minimum 7+ years of relevant industry experience in analog IC design and modelling

Hands on experience in analog circuit design and modelling of high frequency circuits

Experience modelling analog circuits using languages such as VerilogA, SystemVerilog, Python or Matlab

Familiar with Cadence analog design EDA tools

Experienced using Ocean and MDL to automate analog simulations to extract circuit performance

Strong communications and presentations skills suited to interfacing with internal and external customers

An autonomous self-starter that is also a team player

B.Eng. or equivalent (or higher) degree in Electrical Engineering / Microelectronics

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Quality

Completeness: 45%

Not enough history yet to judge honesty signals.

Timeline

  1. *
    #1030130 2026-09-27 11:42 UTC
    Published
  2. ~
    #1030890 2026-09-27 12:49 UTC
    Modified
    • Description
      We at Kandou are a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. Our list of...->We at Kandou are a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. Our list of...